Phyton CodeMaster-52 Revision History


5.00.31

Fixed: Simulation of "PUSH SP" instruction.

5.00.30

Added [PICE-52, PR2-52-HVC]: Preliminary release for the Micronas HVC family. The limited support for the HVC2480 microcontroller. The maximum emulation frequency is restricted up to 16 MHz.

Available features: File/Program downloading for debugging, Run, Stop, High-level step, Code breakpoints, access to the MCU memory and registers.

Unavailable features (not released in the current version): Tracer, Complex Breakpoint Processor, Xdata breakpoints, Data breakpoints, Low-level step, Peripheral freezing, XRAM code debugging, EEPROM and FLASH access.

Fixed [PICE-52, PR2-52-HVC]: Software bug in the startup sequence.

Fixed [PICE-52, PR2-52-HVC]: Bug in the Altera EPM3128 device configuration.

5.00.29

Added[PICE-52, PR2-52-HVC]: Support for MCU Micronas HVC2480.

5.00.28

Changed: Debugging with JEM-52 works now for 30 days, after that it must be licensed.

5.00.27

Fixed [JEM-52, Mentor Graphics M8051EW (Micronas HVC)] DPTR1 content was destroyed if CODE or XDATA dump or disassembler window is open

Fixed [JEM-52]: Minor issues of operation when used with third-party IDEs.

5.00.26

Fixed[PICE-52, PR1-52-A5131]: CodeMaster has a bug that prevented the operation of the PR1-52-A5131 POD.

5.00.25

Added: JEM-HVC support. For the Single-Wire DI is added test pattern generator only.

5.00.24

Updated [PICE-52]: Power monitor for PR1-52-ARX/RE2 pod.

5.00.23

Updated: Examples

5.00.22

Updated: CodeMaster-52 On-line Manual

5.00.21

Updated [JEM-52, Mentor Graphics M8051EW (Micronas HVCA)]: Support driver for IAR Embedded Workbench v. 7.40+.

5.00.20

Added [JEM-52, Mentor Graphics M8051EW (Micronas HVCA)]: Support for Forced Hardware Reset (FHR).

5.00.19

Fixed [JEM-52]: Working with software breakpoints when JEM is started from a third-party IDE

Added [JEM-52]: Support for id3 Semiconductors prototype

5.00.18

Added [JEM-52, Mentor Graphics M8051EW, NXP/Philips LPC952]: Support for combining complex breakpoints.

Added [JEM-52, Mentor Graphics M8051EW]: Start-up message concerning power management.

Fixed [JEM-52, Mentor Graphics M8051EW]: Writing to Extended Stack.

5.00.16

Fixed [JEM-52]: Atmel AT89LPxxx support

5.00.15

Added [JEM-52]: Support for NXP/Philips 89LPC952 chip

Changed: Key mappings for Step, Step Over, Low Level Step, Low Level Step Over, Make, Compile, Next Search and other commands

5.00.14

Added [JEM-52, Mentor Graphics M8051EW]: Support for Extended Stack (MG Extended Stack window).

Updated [JEM-52, Mentor Graphics M8051EW]: Program flow reconstruction algorithm for MG Hardware Tracer.

Added [JEM-52, Mentor Graphics M8051EW]: Support for Extended Operation SFR address in JEM-52 Hardware settings.

5.00.13

Updated [JEM-52, Mentor Graphics M8051EW]: Trace buffer reconstruction algorithm

5.00.12

Fixed: In certain cases, source text line numbers were not calculated correctly for IAR Systems UBROF files.

Fixed: Wrong linker options in banked model for IAR Systems projects

Updated [JEM-52, Mentor Graphics M8051EW]:

1. Tracer works now in 2 modes:

- when complex breakpoints are not used to control the tracer it is always enabled and CM-52 tries to restore the continuous trace history as far as it possible;

- when complex breakpoints are set to control the tracer then CM-52 displays the trace buffer "as is" - according to the data read directly from the trace memory.

2. The overflow indication (red icon in the leftmost trace column) is added now.

3. There is a possibility to power the target via pin 4 of the JTAG connector. This pin is powered by the programmable regulator controlled by the CM-52 Debug Options -> Power management dialog. To enable this feature in JEM-52 you should set the JP1 jumper on the TM2-52-FS-H20 board.

Fixed [JEM-52, Mentor Graphics M8051EW]: It is possible now to set hardware breakpoints while program is running.

Changed [MCLINK Linker]: CR/LF added to the last line of the HEX file.

5.00.11

Updated [JEM-52]: Enabled programming of AT89LP21x fuses

5.00.10

Added [JEM-52]: New POD TM2-52-FS-H20 supporting Micronas HVCA and NXP/Philips LPC952 chips.

Added [JEM-52]: Support for Mentor Graphics M8051EW hardware tracer.

5.00.09

Added [JEM-52, HVCA]: Support for extended core features: extended code addressing

Added [JEM-52, HVCA]: Peripheral device window for sequencer debugging

5.00.08

Added [JEM-52, HVCA]: Diagnostic of time-out of the Debug Commands Sequencer

Added [JEM-52, HVCA]: Changing of the On-Chip Debug Interface clock frequency

5.00.07

Added [JEM-52, HVCA]: Software breakpoints in RAM

Added [JEM-52, HVCA]: Error messages for "Invalid chip Id" and "JTAG Error"

5.00.06

Added [JEM-52, HVCA]: Loading program to RAM

Added [JEM-52, HVCA]: Hardware code breakpoints are implemented

5.00.05

Added: Preliminary release with Micronas HVCA device support. This release is for HVCA developers only. JEM-52 communicates with HAPA emulation board in 4-wire JTAG mode.

Fixed [MCLINK Linker]: Information on segment name/position and source file name/line added to diagnostic messages.

5.00.04

Updated [JEM-52]: Programming of AT89LP21x fuses is temporarily disabled

5.00.03

Added: Support for Atmel AT89LP214, AT89LP216 devices.

Added: Raisonance (R) C Compiler evaluation version included into the CodeMaster software package

5.00.02

Added: Support for Fuses/Lock Bits

5.00.01

Fixed: JEM-52 resident software Added: Fuses and lock bits warning dialogs

5.00.00

Beta Release